Micron Technology Operations India LLP (a US-based semiconductor firm manufacturing DRAM and SSD chips) | Hyderabad

• Senior Engineer - High Bandwidth Memory (HBM) Verification
  • Founded Micron’s first ever 3-pronged verification Dev-Ops group with dedicated teams for Feature Verification, Coverage & Infrastructure development, and Design Quality Assurance, creating 3 unique job roles and 20+ openings.
  • Reduced managerial span of control by 60% by hiring 3 senior leaders to take charge of each new Dev-Ops group and by delegating IC engagement & frontline engineering support roles to 6 sub-leads promoted from within the team.
  • Accelerated the ramp up of the newly hired leaders by 50% by creating infrastructure for tracking deliverables and providing clear visibility of IC task assignments, thereby empowering them to begin driving their teams sooner.
  • Mitigated a potential 8-week project delay by proactively launching 6 strategic recovery initiatives to improve engineer performance, which were instrumental in maintaining the schedule of critical deliverables.
  • Reduced time for specification change alignment between overseas teams (in USA & Japan) by 20% by creating a formal documentation methodology and change tracking system, now adopted as a global standard for the HBM vertical.
  • Represented the India HBM VE group at a Directorial Summit meeting in USA attended by senior leaders from all 6 HBM engineering teams, during a 2-month trip abroad to assist the post-silicon validation team with the HBM3e ramp.
     
• Engineer (E2) - High Bandwidth Memory (HBM) Verification
  • Trained & led a team of 18 new college graduates and contractors with no relevant industry experience and enabled them to own the simulation infrastructure of 90% of the product’s unique features within 8 months.
  • Managed a significant operational crisis of losing 95% of key HBM SMEs due to the Micron Shanghai’s abrupt closure, by driving aggressive upskilling initiatives for three months thereby mitigating an anticipated project delay of 2 months.
  • Delivered a functional defect free design in the very first release that passed all internal qualification processes and was cleared to be shipped as samples to Nvidia, thereby making Micron the first-to-market OEM for HBM3e products.
  • Led the first-ever Verification Results Review wholly conducted by an Indian team, presented to the global HBM Engineering Group, a 200+ member collective of semiconductor design and manufacturing experts.
     
• Engineer (E1) - High Bandwidth Memory (HBM) Verification
  • Fully owned the initiation, debug, and evaluation of 3 major Full-chip verification processes for a new LPDDR5x product just 4 months into the job, later proceeded to codify their best-known methodologies as well.
  • Fully owned the testbench development and verification of a new Error Correction feature introduced in the DDR5 architecture that handles background data integrity checks.
  • Led the training program for 60+ interns, contractors, and new employees, making a radical improvement on the pre-existing content to suit the educational background of most Indian engineers, reducing the training time by 40%.
  • Identified a critical issue with Micron's product specification which could not have been detected by any existing verification method, saving a possible major revision of the product that could have cost up to USD 10 Million.
  • Fully automated a verification flow for finding critical timing violations, reducing the man hour cost by 70% per-project, and improved the flow to be immune to human error, auditable, and reusable for similar future products.

• Awarded the Micron India Culture Champion Award for successfully delivering Micron’s first-to-market HBM3e memory.

• BE(Electronics and Instrumentation Engineering), BITS, Pilani

• Lean Six Sigma Green Belt Certification
• Microchip Masters Certification
• Fundamentals of Audio and Music Engineering, University of Rochester

• Coordinator (Jul’18 – Dec’18): Managed the concert equipment procurement and budgeting negotiations for outfitting 3 stages for the BITS College fest (Oasis) with 500+ participants and a footfall of 6000+.